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Digital PLL achieves a power consumption of 0.265 mW
Tue, 19 Feb 2019 10:30:02 EST
Scientists at Tokyo Institute of Technology have developed an advanced phase-locked loop (PLL) frequency synthesizer that can drastically cut power consumption. This digital PLL could be an attractive building block for Bluetooth Low Energy (BLE) and other wireless technologies to support a wide range of Internet of Things (IoT) applications.
